Small Leadless-SMD Packages Replacing Large Modules for High Power GaN and SiC Products

Power WBG Package Requirements

The power Wide Band Gap (WBG) market is ramping with SiC and GaN devices replacing Si FETs and IGBTs for higher power and higher voltage products. These WBG materials will not only provide far superior performance and speed, but provide higher power densities, efficiency, reliability and cost effectiveness. Certainly conversion from Si to these WBG materials has been challenging, as WBG device processing, types and configurations are optimized. The progress has been slow but steady, and we are finding that different application circuits are needed to optimize products for WBG devices.

The writing has been on the wall for traditional high power leaded packages and modules. If we read the fine print on the wall, we see it is inevitable that large high power packages and modules must be replaced by leadless micro-packages, and that system integration and architecture are essential to enabling the WBG improvements in performance, speed, power density, efficiency and reliability. Today’s power packages and modules are not only unsuitable for WBG devices; they are already limiting performance of today’s power Si FET and IGBT devices. It will take a market leading early adopter company to provide lasting change impact in the industry.

Inevitable Changes to Power WBG Packages

The power package and module industries have a lot of momentum, and the GaN and SiC industries focus has been on device development. As a result current WBG device potential performance, efficiency and power density have not been fully realizable in actual applications. It is now time to turn our attention to optimum packaging for power GaN and SiC devices. The good thing is that suitable leadless, wire bondless, and surface mount technologies already exist in other applications, and it is time to hijack the available assembly capabilities and facilities for innovative power package architectures, and move forward with higher power WBG devices like GaN and SiC.

Early WBG SMD packages included QFN and LGA types with some performance improvements, and new Power QFN and Embedded LGA increase performance further, but at the expense of increased manufacturing complexity, costs and interface reliability

New High Power WBG SMD Packages

More compelling options are demonstrated in the “mMaxPak” as described in U. S. patent 9214416. These new package architectures provides double-sided assembly of QFN type leadframes and LGA type substrates, by incorporation open bottom-side cavity(s) for WBG power die, thereby enabling more components to be included, optimum electrical and thermal performance, higher  power density, and higher reliability.

Click image to enlarge

Figure 1: μMaxPak Smart Single-Switch Cross-Section

Figure 1 shows the basic mMaxPak Single-switch architecture with WBG power die in bottom-side cavity with exposed drain pad, and top-side gate-driver IC with driver output pads directly over the WBG gate and source leadframe pad. The integrated gate driver die virtually eliminates common-source inductance and enables higher switching speeds.

Click image to enlarge

Figure 2:μMaxPak Inverted Single-Switch Cross-Section

Figure 2 shows inverted mMaxPak architecture with WBG gate and source pads exposed on the bottom-side. The leadless and wirebondless mMaxPak with heavy copper leadframe provides very low current loop inductance (L) and resistance (R) for interconnect current loop. Parasitic L and R are reduced further with half-bridge (HB) packaging, micro-packaged) high-side and low-side die. See Table 1 for summary of achievable mMaxPak performance based on a 5x5mm to 5x6mm die.

Figures 3a and 3bshow HB mMaxPak leadframe layout with 5mmx6mm power SiC die, and the 8mm x15mm mMaxPak  Half-bridge  package for 125A/1200V demonstrate exceptionally low current loop-inductance(0.1-0.2nH) and loop-resistance(100-200mohm) shown in Table 1 . Adding integrated gate-driver IC can virtually eliminate any common-mode gate inductance. The Rjc for each die can be <0.1C/W, accommodating higher power and higher efficiency. The same HB package can accommodate two 5mmx6mm 650V GaN Die with 650V/250A output.

Click image to enlarge

Figure 3a and 3b: See captions embedded in images

Click image to enlarge

Table 1: Potential µMaxPak HB Performance with 5x5 mm WBG Die

Furthermore, the mMaxPak technology enables minimum development time, cost and risk, based on proven low cost commercial assembly existing QFN and LGA technologies.

Small WBG SMD Packages Reduce System Size & Increase System Performance

System integration and performance are equally enhanced with high-density leadless mMaxPak power packages. The compact systems further enable high speed GaN and SiC power device performance, by eliminating long electrical connectors, leads, and terminals, which increase size and cost of convention module type building blocks used with IGBT products at hundreds of volts and hundreds of amperes. The integrated systems reduce the larger required isolation spacing by eliminating many exposed high voltage leads and terminals. SMD board spacing can generally comply to UL pollution degree 1 with suitable SMD under-fills and coatings, whereas exposed leads and terminal spacing typically require pollution degree 2 or 3 spacing. These minimum spacings are very small relative to traditional exposed lead and terminal spacing, but traditional product already use these same spacings inside industrial and commercial high-power modules with suitable coating materials.

Figure 4a shows traditional 600/1200V Si Motor Drive building block architecture with traditional HB IGBT modules, and Figure 4b shows 600V GaN/1200V SiC mMaxPak Power Components an all SMD Motor Drive Thermal Mother-Board architecture with power SiC or GaN switches in mMaxPak HB packages with integrated gate driver ICs. The example shows enhanced Mode GaN die and MOSFET SiC die, but other GaN and SiC type die can be used with modified leadframes. It should be noted that regardless of WBG device type, die and leadframe pads should be co-designed for optimum performance, manufacturability and reliability.

Click image to enlarge

Figures 4a and 4b: See captions embedded in images

Power WBG devices like GaN & SiC are very small with high power density, speed, performance and efficiency. The reduced parasitics of the very small devices are an integral part of these improvements. But, product performance is limited by the combined parasitics of device, package and system. If package and system size and parasitics are not reduced accordingly, much of the WBG device advantages will not be realized in finished products. At lower powers and voltages, some bump-chip GaN devices have eliminated package parasitics by eliminating the package, but at higher power and voltages packages are required for environmental protection, high-voltage isolation, high-current inter-connects and high power dissipation. Even some bump-chip or package-less devices require added complexity increasing parasitics on their board and system PCB.

SMD packages can reduce loop L and R by eliminating leads, terminals and wire bonds. Importantly, smaller packages can reduce system size, inter-connect length and associated loop L and R. Equally important, SMD system assembly eliminates complex, costly and large leads, terminals, connectors, hardware, and associated minimum separation required for the high-voltage isolation.

In Summary

The SMD system assemblies are easier, cheaper, and potentially more reliable. New power SMD packages like the mMaxPak are different, but built on proven commercial QFN and LGA technologies, which are available and require less tooling, NRE and development time. Such packages also accommodate vertical integration of gate drives and other components, further enhancing device performance and providing better control of parasitics by the device manufacturer.

So existing WBG packages are severely limiting product performance, and power micro-SMD packages are inevitable for power WBG devices to evolve to their real potential.

Semiconductor Packaging Solutions