SiC MOSFETs empower LED driver design

For high-bay and outdoor lighting fixtures, the cost of the LED driver electronics is reported to be 17% of the total fixture cost. An additional 40% of the fixture cost is contributed by the mechanical, thermal, and electrical portions of the fixture [1], which, in part, help support the weight and volume of the LED driver, as well as protect the driver against surge events, such as lightning strikes. The availability of rugged LED drivers that are also smaller, lighter, and cheaper than existing devices will become the de-facto standard of the lighting industry in the near future, bringing significant cost reductions to high-bay and outdoor lighting fixture manufacturers.

Single-stage topologies (such as the quasi-resonant flyback shown in Figure 1a) are widely used in low power (< 100W) LED lighting applications primarily because of their low cost, simplicity (low part count), and acceptable performance. At higher power levels, however, these single-stage topologies become impractical, forcing designers to increase the complexity of their designs (e.g., increasing switch count). This increases the overall driver cost and erodes the price/performance point that single-stage topologies are able to achieve.

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Figure 1a: Single-stage flyback-based LED driver topology

At power levels above 100W, two-stage topologies begin to deliver a better price/performance solution than single-stage topologies despite their increased complexity and part count. Consequently, higher power LED drivers are typically implemented using two-stage topologies, such as the power factor correction boost converter plus LLC resonant half-bridge shown in Figure 1b. 

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Figure 1b: Two-stage driver topology implemented using a boost PFC and LLC half bridge.

The power semiconductor switch performance within the driver has a significant impact on where the price/performance boundary between single- and two-stage topology is established. For current silicon (Si) super junction MOSFET technology, this boundary appears in the 75-100W range. For example, Cree’s C2M silicon carbide (SiC) MOSFET technology, which significantly outperforms Si devices (see Table 1), the price/performance boundary between single- and two-stage topologies is about 3x higher: 250—300W vs. 75—100W. As such, a new generation of high-power single-stage LED drivers based on SiC MOSFETs is now possible with unprecedented price/performance characteristics.

These next-generation high-power single-stage LED drivers deliver the performance of a two-stage topology while maintaining the cost structure of a single-stage topology. These new SiC MOSFET-based single-stage LED drivers are also capable of achieving unparalleled power density – delivering 40% volume reduction and 60% weight reduction compared to present driver technology (see Figure 2). These significant reductions in both weight and volume further increase the overall value of the new drivers by subsequently reducing the requirement for, and thus the cost of, the lighting fixtures’ supporting mechanical structural components.

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Figure 2: Side-by-side comparison of two 200W LED drivers: one using Si super junction MOSFETs and two-stage topology, and the other using a Cree C2M SiC MOSFET and single-stage topology.

Additionally, the benefits of SiC MOSFET technology in LED drivers extend far beyond the 150-250W single-stage drivers discussed herein. For example, SiC MOSFETs used in two-stage topologies can also address especially challenging requirements, including: high voltage (528VAC), ultra-wide input voltage ranges (90—528VAC), high power (> 300W), and/or high efficiency (> 95%). Further, as SiC MOSFET technology continues to move into lower voltage and lower power applications, they will also become the device of choice in LED power supply application <100W.

Design challenges

Five key limitations and challenges must be overcome in order to implement a single-stage topology in high power LED lighting: 1) low efficiency, 2) narrow operating voltages, 3) the high cost of EMI filter components, 4) the high cost of surge protection components, and 5) high output current ripple (flicker) characteristics.

Low efficiency and narrow operating voltages

The current and voltage stresses imposed on power MOSFETs are typically higher in single-stage topologies than two-stage topologies. These stresses are increased even further for wider operating voltages. Ultimately, these stresses have a significant impact on the converter efficiency, as well as the rating (and hence the cost) of the power MOSFET used in the design. This is the primary reason why single-stage topologies are limited to low power designs with narrow operating voltages.

Despite their 1200V rating, SiC MOSFETs deliver Figures of Merit (FOMs) that are 4—15x better than best-in-class 900V Si super junction MOSFETs (see Table 1). As such, SiC MOSFETs increase the power level of single-stage topologies by approximately 3x while delivering efficiencies and operating voltages that are equivalent to those obtained with two-stage Si-based topologies. Figure 3 depicts the efficiency vs. input voltage of two 220W LED drivers: one implementing a two-stage topology with Si MOSFETs, and the other implementing a single-stage topology with two versions of Cree’s SiC MOSFETs. Both drivers have equivalent operating voltage windows (120–277VAC), but the single-stage driver using SiC MOSFETs exhibits superior efficiency, effectively demonstrating that SiC MOSFETs can address the typical limitations of high-power single-stage LED drivers by providing high efficiency over a wide operating voltage range.

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Table 1: Key parameters and Figures of Merit (FOMs) for various MOSFET technologies

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Figure 3: Efficiency vs. input voltage for two LED drivers: a single-stage flyback using a Cree C2MTM SiC MOSFET, and a classic two-stage Si MOSFET.

The high cost of EMI filter components

One common perceived challenge of single-stage, high power LED drivers is the need for more expensive EMI filters. The EMI signature of a flyback configuration is higher than that of a continuous conduction mode (CCM) boost PFC; however, it is important to note that the EMI signature of a QRC flyback is similar to the EMI signature of discontinuous conduction mode (DCM) boost PFC typically used in two-stage LED drivers. Additionally, it is common knowledge that QRC flyback drivers operate using a variable switching frequency and have a reduced EMI spectrum compared to fixed-frequency flyback drivers. This spectrum reduction results from the spreading of RF emission over a wider frequency range as the switching frequency (and its harmonics) shift throughout the AC line cycle.

EMI signature is a function of topology and operating point. Therefore, one could conclude that changing from Si super junction MOSFETs to SiC MOSFETs will not help in this regard. However, Class B conducted EMI compliance limits only drop with a 20dB/dec slope from 150—500kHz. Common EMI filters for single-stage topologies are implemented using a two-stage LC EMI filter, which provides a maximum attenuation slope of up to 80dB/dec. Thus, given a particular EMI filter size (and cost), the harmonic spectrum of a power converter operating at a higher switching frequency will be more attenuated than the harmonic spectrum of a power converter operating at a lower switching frequency.

Figure 4a shows the theoretical EMI signature of a two-stage topology with a DCM boost PFC first stage. Typically, the switching frequency of the first stage is 60—150kHz in order to avoid the fundamental switching frequency component approach the lower EMI frequency limit (150kHz). However, two-stage LC EMI filters are generally required in order to reduce the spectrum of the second, third, and higher order harmonics for EMI compliance.

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Figure 4a: EMI filter design exercise for a conventional two-stage design showing the Class B conducted EMI limit, theoretical EMI signature of the unfiltered supply (Supply), EMI filter attenuation (Filter Attn), and EMI signature of the filtered supply (Filtered Supply).

As illustrated in Figure 4b, the higher operating frequency (>200kHz) enabled by SiC MOSFETs, the same EMI filter design used in the two-stage topology can deliver an extra 15dB attenuation for the first harmonic, 35dB attenuation for the second harmonic, and 40dB attenuation for the third harmonic, enabling the single-stage topology to reach EMI compliance without additional EMI filter cost. Additionally, a careful look at the two power supplies in Figure 2 also shows that the two-stage solution and the single-stage solution with SiC MOSFETs have similar EMI filter sizes (and hence costs).

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Figure 4b: EMI filter design exercise for a single-stage high-frequency design showing the Class B conducted EMI limit, theoretical EMI signature of the unfiltered supply (Supply), EMI filter attenuation (Filter Attn), and EMI signature of the filtered supply (Filtered Supply).

The high cost of surge protection

Two-stage topologies have large intermediate DC bus capacitors that help reduce overvoltage to the power MOSFETs during surge events. Single-stage topologies place these large capacitors at the output of the driver to limit output ripple. As such, power MOSFETs in single-stage LED driver topologies are more vulnerable to overvoltage from surge events, and thus require larger and more costly surge protection components and circuits.

However, as shown in Figure 5, due to the higher blocking-voltage capability of SiC MOSFETs (1200V blocking and 1600V avalanche) compared to 900V Si MOSFETs, an equivalent surge protection device will absorb 2.5x more current and 5x more power than a 900V Si MOSFET. Consequently, a single-stage topology implemented using a SiC MOSFET has a 2.5—5.0x higher surge capability than a typical single-stage topology implemented using 900V Si MOSFETs, effectively satisfying the latest 4kV and 6kV surge requirements without increasing the cost of the surge protection components. Alternately, in order to achieve the same level of surge protection with Si 900V super junction MOSFETs, the size and cost of the surge protection components must be increased 2.5x.

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Figure 5: Improved surge protection capability (2.5x higher current) due to the higher avalanche voltage of Cree C2M MOSFETs compared to traditional 900V Si super junction MOSFETs.

High output current ripple (flicker)

Another challenge of single-stage topologies vs. two-stage topologies is output current ripple. Line frequency output current ripple translates into light output variation (flicker) for the LED array, so the Alliance for Solid-State Illumination Systems and Technologies (ASSIST) has established maximum light flicker acceptability criteria. Current ASSIST guidelines state that light flicker greater than ±10% percent at 100Hz and greater than ±15% percent at 120Hz is unacceptable [2]. To meet these criteria and minimize light flickering, LED drivers must minimize current ripple.

Figure 6 illustrates the relationship between LED current variations and light output variations. The figure shows that a ±15% variation on current translates to only ±10% variation on light output. While this relationship is unique for each LED type, it is generally accepted that an LED driver with ±10% variation in output current will meet the flicker demands of most LED arrays.

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Figure 6: LED current variation vs. luminous flux variation for a Cree® XLamp® XP-G2 high-brightness LED.

Two-stage topologies have a large, high-voltage DC link capacitor that is used as a line frequency energy buffer. The second stage is used to compensate voltage variations in the DC link capacitor and reduce output current ripple to ±5% via a high-bandwidth current control loop. Single-stage topologies do not employ high voltage DC link capacitors, but instead use their output capacitors as energy storage elements. The control of the output current is implemented as a low-bandwidth average current control loop, which is typically not capable of compensating for line frequency current ripple. This topological limitation cannot be addressed by simply changing power MOSFET technologies; however, the output current ripple can still be minimized in a cost-effective manner by minimizing output voltage ripple via output capacitor sizing and the proper tuning of the current control loop.

A given LED array’s dynamic resistance determines the current ripple for a given voltage ripple. High performance LED arrays tend to have lower dynamic resistance and hence a small voltage ripple typically translates into higher current ripple. Figure 7 depicts measured current ripple when a single-stage flyback driver with a SiC MOSFET is used to drive a high performance LED array containing Cree® XLamp® XP-G2 high brightness LEDs. The measured output current ripple is ±11% at 120Hz, which translates into ±9% light flicker, and is well within the ±15% percent mandated by ASSIST.

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Figure 7: Measured output current ripple of a single-stage SiC MOSFET based flyback driver delivering 220W into a high performance LED array (worst case) containing Cree XLamp XP-G2 high brightness LEDs

The output capacitors in this SiC single-stage flyback driver are the same as the capacitors used in the DC link and output sections of the Si two-stage driver (See Figure 2). As such, both driver approaches have the same capacitor cost. Adding output capacitance could improve current ripple without significantly impacting cost, as capacitors represent only 8% of the total BOM cost, and reducing input current total harmonic distortion (THD) could reduce current ripple an additional 8—10% with no additional BOM cost while still meeting EN61000-3-2 standards. 

Example: 220W LED driver with universal input voltage

Table 2 shows the key metrics of a typical high performance 220W LED driver using Si super junction MOSFETs in a two-stage topology and SiC MOSFETs in a single-stage flyback topology. Both drivers have similar characteristics in terms of power, input voltage range, efficiency, THD, and power factor. The single-stage topology has higher output current ripple than the two-stage topology, but is still squarely compliant with ASSIST mandates. So, more importantly, the single-stage topology using a SiC MOSFET provides significant cost reduction (>15%), volume reduction (~40%), and weight reduction (~60%) (see Figure 2), and is also capable of meeting EMI Class B requirements and surge requirements to 4kV, L-L while delivering acceptable output current ripple.

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Table 2: Main characteristics of a 220W LED driver implemented using Si super junction MOSFETs and two-stage topology vs. a Cree C2M SiC MOSFET and single-stage topology.

Table 3 contains the approximate cost reduction of the two-stage topology with Si super junction MOSFETs vs. the single-stage topology with a SiC MOSFET. Although the actual price of components will vary with volume, the relative price difference of the two solutions is quite relevant.

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Table 3: Cost comparison for a 220W LED driver with universal voltage input implemented using two-stage topology with Si SJ MOSFET vs. a single-stage topology with SiC MOSFET.

Choose wisely

Single-stage topologies deliver LED driver solutions with acceptable performance at a lower cost than two-stage topologies. As such, single-stage topologies are the approach of choice for lower power (<100W) LED drivers. At higher power levels, single-stage topologies face challenges that limit their usability and value, including: a limited operating voltage window, lower efficiency, and the need for additional surge protection. Consequently, two-stage topologies have dominated the market for high power LED drivers (>100W).

Many of the limitations faced by single-stage topologies in high power applications can be traced back to a single root cause: the performance and FOMs of the power MOSFETs employed therein. When using state-of-the-art 900V Si super junction MOSFETs, the value proposition of single-stage topologies – lower cost, smaller size, and reduced weight – is not possible. Alternately, SiC MOSFET technology not only allows lighting designers to reap the benefits of single-stage topologies in high power applications, but also, by outperforming Si super junction MOSFET technology (see Table 1), moves the price/performance boundary of single-stage topologies from the 75–100W range enabled by Si MOSFETS up to 250–300W. As such, single-stage topologies employing SiC MOSFETs can now deliver lower cost solutions than two-stage approaches without comprising performance. While a flyback topology was used here as an example for 220W LED driver, other single-stage topologies (i.e., forward, SEPIC, etc.) are also possible using SiC MOSFETs. 

Use of SiC MOSFET technology is not limited to LED drivers in the 150–300W range. SiC technology can be combined with two-stage topologies in order to address an array of unique design challenges, including: high power LED drivers (up to 1,000W), ultra-wide input voltage ranges (up to 528VAC), high efficiency (> 95%), and high power density. Additionally, as SiC MOSFET technology continues to move into lower power and lower voltage applications, typical single-stage LED drivers (<75W) will also benefit from the lower total BOM, improved performance, and higher power density it enables. Consequently, SiC MOSFET technology is poised to become the device of choice for LED drivers in all power ranges.

Cree

References:

[1] “Solid-State Lighting Research and Development, Manufacturing Roadmap,” U.S. Department of Energy, Office of Energy Efficiency and Renewable Energy, (September 2013), http://apps1.eere.energy.gov/buildings/publications/pdfs/ssl/ssl_manuf-roadmap_sept2013.pdf.

[2] “Flicker happens. But does it have to?” Cree, (2014), www.cree.com/~/media/Files/Cree/.../XLamp/.../Flicker.pdf.