Author:
Rafael Garcia, Principal System Applications Engineer, Infineon Technologies
Date
05/03/2021
PDF
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Figure 1: Circuit diagram of the proposed solution using CoolMOS™ in a half-bridge configuration
As a result of the pandemic that lately has had a significant impact on our lives, communication networks became a crucial part of critical social infrastructure. To achieve the required server capacities and fast connectivity and address the challenges of this unprecedented situation and, highly efficient server and telecom switched-mode power supplies (SMPS) are required. SMPS must reach higher output power levels while maintaining the same form factor. At the same time, this higher power density and efficiency must come hand in hand with lower cost, modularity, and design simplicity. The silicon solution we describe in this article fulfills all of these and achieves more than other standard silicon solutions currently available in the market.
Achieving an overall efficiency of 98 percent requires super high-efficiency levels in the power factor correction (PFC). Due to standard PFC topologies’ limitations, bridgeless PFC topologies like the continuous conduction mode (CCM) totem-pole PFC are coming forward [1]. However, in CCM operation mode, the half-bridge switches operate mainly in hard-commutation, which avoids the possibility of using silicon (Si) superjunction (SJ) MOSFETs since they cannot offer the required high efficiency. Instead, using Si SJ MOSFETs in a half-bridge configuration in CCM operation can even lead to catastrophic failures [2].
If Si SJ MOSFETs, such as Infineon’s CoolMOS™ transistor products, are required for high-end applications, then a different control strategy is necessary. Triangular current mode (TCM) [3] can obtain full zero voltage switching (ZVS) operation, which leads to increased efficiency. However, it requires interleaving of at least two power stages due to the high inductor current ripple. Also, the rise of part count requires a higher switching frequency to increase the power density. Moreover, due to interleaving with a variable switching frequency, the control complexity rises significantly further.
The Infineon solution presented in this article is an attractive and straightforward solution that overcomes these difficulties and makes it possible to use Si SJ MOSFETs in half-bridge CCM operation, achieving the highest efficiency in the totem-pole PFC topology at an attractive price-performance ratio. The working principles and the measured experimental results are discussed in the following sections.
Figure 1 depicts a circuit diagram for a typical double-pulse test platform using the proposed solution. This setup configuration reflects the same situation of “diode-to-switch transition” in the totem-pole PFC operating in CCM where hard-commutation of the “diode mode” switch occurs every switching cycle.
In the half-bridge configuration of Figure 1, Q2 typically turns on with soft-switching after Q1 turns off, given the energy accumulated in the inductor connected to the switching node. However, when Q2 is turned off, the inductor current keeps flowing through its body diode, and, when Q1 is turned on, a hard-commutation of the body diode current occurs, leading to catastrophic results.
Infineon’s solution is based on pre-charging the COSS capacitance of the freewheeling or “diode mode” (Q2 in Figure 1) Si SJ MOSFET at a certain level, e.g., 24 V. By doing this, the losses associated with its output capacitance charge (QOSS) and the reverse recovery charge (Qrr) of its body diode during the turn-off transition are drastically reduced since those charges are provided from a low voltage source.
As a result, there is a significant reduction in the commutation losses in the Si SJ MOSFETs, while it also allows for continuous hard-commutation in the normal CCM operation of the totem-pole PFC.
With the proposed solution, the added hardware complexity is minimal since it requires a single high-voltage Schottky diode (D1 and D2), a low voltage (LV) MOSFET (Q3 and Q4), and a capacitor (CHS_DP and CLS_DP) per power device in the half-bridge. Also, two supply voltages are necessary for driving the LV MOSFET and provide the pre-charge voltage. A level-shifting (bootstrap capacitors) technique is also implemented, with traditional drivers for both the driver supply and the depletion voltage (highlighted in orange and gray, respectively).
The included Rx-Cx and Ry-Cy filter networks at the driver inputs allow the proper timing of the PWM signals to the half-bridge devices and the added LV switches; thus, no extra PWM signals from the controller are required.
Figure 2 presents the main waveforms happening during the hard commutation of a half-bridge implementing Si SJ MOSFETs Q1 and Q2. The time axis only shows the transitions that occur at the different PWM events, and it is not in scale. The way that hard commutation transition works with the proposed solution is explained in Table 1.
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Figure 2: Commutation waveforms of the proposed solution
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Table 1: Hard commutation transition with the proposed solution
The concept presented in this article has been tested in Infineon’s 3.3 kW totem-pole bridgeless PFC evaluation board switching at 65 kHz and using SMD components. Figure 3 shows this system solution implementing the power switches, diodes, drivers, and controller presented in Table 2. The pre-charge circuit has been designed according to [4], and it is implemented with the design values in Table 3.
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Figure 3: Prototype of the 3.3 kW totem-pole PFC board implemented with CoolMOS™ CFD7 and S7 SJ MOSFETs
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Table 2: Infineon products (IPT60R090CFD7, BSZ440N10NS3, IDDD08G65C6, 2EDF7275F, 1EDN8511B, IPT60R022S7, XMC1402) used in the 3.3 kW totem-pole evaluation board with Si SJ CoolMOS™
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Table 3: Pre-charge loop parameters when 2x IPT60R090CFD7 are used in parallel in the half-bridge
Figures 4 and 5 show the measured efficiency of the presented evaluation board, including the bias consumption but not the fan’s power consumption.
The power factor is over 0.95 when the load is higher than 20 percent of the nominal output power and a THD under 5 percent for an output power over 50 percent of the nominal one.
The maximum efficiency is over 98.9 percent in the range of 1000 W to 1500 W output power and over 98 percent for the measured power range.
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Figure 4: Efficiency measurement of the totem-pole PFC with the proposed solution, including the bias supply, and without considering the fan consumption
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Figure 5: Combining CoolMOS™ with OptiMOS™, EiceDriver™, and CoolSiC™ Schottky diode 650 V enables close to 99 percent peak efficiency in the PFC stage
With Infineon’s CoolMOS™ CCM totem-pole PFC solution, the next level of silicon-based efficiency can be reached, making it a cost-attractive alternative that complements its powerful offering of wide-bandgap solutions.
This innovative concept enables the usage of Si SJ MOSFETs in CCM totem-pole PFC applications through a simple and effective pre-charge circuit, which allows the depletion of the Si SJ MOSFETs and thus brings QOSS and Qrr losses to a minimum.
This article demonstrated the working principles of this innovative concept and the experimental results based on an evaluation board of a totem-pole PFC board implemented with Infineon’s CoolMOS™ SJ MOSFET technology (CoolMOS™ CFD7 and CoolMOS™ S7 SJ MOSFETs).
Thanks to this technology, our implementation achieved a maximum efficiency of over 98.9 percent in the range of 1000 W to 1500 W output power and over 98 percent in the measured power range.
By relying on Infineon’s broad portfolio solution offering, converter system designers can reach the highest efficiency levels in CCM totem-pole PFC at the desirable price-performance ratio and meet the high-end server and telecom application requirements. To learn more about the groundbreaking Si-based CCM totem-pole PFC system solution, please visit www.infineon.com/EVAL-3K3W-TP-PFC-CC.
[1] L. Huber, Y. Jang, and M. M. Jovanovic, “Performance Evaluation of Bridgeless PFC Boost Rectifiers,” in IEEE Transactions on Power Electronics, vol. 23, no. 3, pp. 1381-1390, May 2008.
[2] R. Siemieniec, O. Blank, M. Hutzler, L. J. Yip and J. Sanchez, “Robustness of MOSFET devices under hard commutation of the body diode,” 2013 15th European Conference on Power Electronics and Applications (EPE), 2013, pp. 1-10
[3] C. Marxgut, F. Krismer, D. Bortis, and J. W. Kolar, “Ultraflat Interleaved Triangular Current Mode (TCM) Single-Phase PFC Rectifier,” in IEEE Transactions on Power Electronics, vol. 29, no. 2, pp. 873-882, Feb. 2014.
[4] M. Kutschak, D. Meneses, M. Escudero, R. Garcia Mora, “Lossless hard-commutated operation of SJ MOSFETs and application to CCM totem-pole bridgeless PFC,” PCIM paper May 2021
