Renesas Launches Integrated Code Generator Support for new 32-bit RISC-V MCU with SEGGER Embedded Studio

­In collaboration with Renesas, SEGGER announces that Embedded Studio has now been integrated into the Renesas code generator known as Smart Configurator. This brings end-to-end SEGGER support for the new R9A02G021 group of MCUs, Renesas’ first 32-bit RISC-V devices for general purpose applications.

The Renesas Smart Configurator enables design engineers to graphically configure all MCU peripherals such as timers, interfaces, and interrupt controllers to generate source code projects ready to build in SEGGER Embedded Studio. Engineers can take advantage of the excellent code optimization of the built-in C/C++ compiler and the market-leading debug capabilities of the J-Link debug probes to bring their RISC-V designs to market quickly.

“Global ecosystem partnerships are very important to support the success of any new product," says Daryl Khoo, Vice President of the Embedded Processing 1st Business Division at Renesas. “We are excited to partner with SEGGER to provide our customers with reliable and efficient development tools for Renesas’ first commercially viable 32-bit RISC-V product, targeting general purpose applications. Together, our solutions can accelerate the RISC-V-based product adoption.”

"Partnering with Renesas on this exciting new MCU group further demonstrates SEGGER’s commitment to supporting key silicon vendors in the fast-moving RISC-V market,” says Rolf Segger, founder of SEGGER. “With SEGGER's Friendly License, Embedded Studio is free for non-commercial use and can always be evaluated (commercially or not) without cost, registration, or restriction. Ease of use, small code size, fast execution speed and many other features have led to an increase in popularity with both end users and silicon vendors.”

Renesas and SEGGER partnered on this project from the very beginning to ensure top-of-the-line support for the new MCU and to demonstrate that SEGGER’s toolchain is the “go-to” option for RISC-V users.

The  SEGGER ecosystem of development tools for RISC-V includes Embedded Studio (multi-platform IDE with the highly optimizing C/C++ SEGGER Compiler), Ozone (full-featured graphical debugger), and SystemView (real-time recording and visualization tool) as well as programming and debug support with SEGGER’s industry leading J-Link family of debug probes.

For the production phase, SEGGER’s robust and reliable Flasher family of in-circuit programmers ensure a high yield rate. These production tools inherit programming support for the R9A02G021 group from J-Link. Programming external memories via the microprocessor is supported as well.

For more information about any devices supported by Embedded Studio, J-Link, and Flasher, go here.