Date
12/12/2013
PDF
Lattice HetNet Solutions Portfolio
Lattice Semiconductor announced a portfolio of programmable solutions for building smart, low-power cellular equipment needed to support the global rollout of Heterogeneous Networks (HetNet). In collaboration with Azcom Technology, the Lattice HetNet Solutions Portfolio enables system designers to implement best-in-class solutions for connectivity, control path and power management while accelerating their development with system-level reference designs for multi-mode LTE small cells.
Service providers around the world are deploying a mosaic of wireless equipment in both indoor and outdoor environments including office buildings, public facilities and underground areas to support the explosive growth in mobile data traffic. According to the Small Cell Forum* in a report released at this year’s Mobile World Congress, the small cell market alone is expected to generate $22 billion by 2016.
The Lattice HetNet Solutions Portfolio enables designers of small cells, low-power remote radio heads, distributed antenna systems, and active antennas, to achieve the lowest BOM, power consumption and smallest footprint for the connectivity, control path and power management functions of their systems. Complementing the ASICs and SOCs used for complex data path functions, Lattice’s industry leading FPGAs, CPLDs and programmable power management devices meet requirements for small form factor, low-cost and ultra-low power.
“FPGA technology like LatticeECP3™ devices which can support key connectivity interfaces such as CPRI, JESD207 and others in a small, low-power footprint, are a major enabler for a new generation of mobile infrastructure equipment,” said Ajit Singh, CEO at Azcom Technology. “Hardware programmability to cope with the many interoperability requirements and complex network environments is a must for developers as the HetNet market continues to evolve.”
“The low power, low cost, small form factor requirements of the HetNet market play into Lattice’s core strengths of providing low cost, low power programmable devices for connectivity, control path and power management,” said Jim Tavacoli, Senior Director of Communications Segment Marketing for Lattice. “The HetNet market is a key growth driver for Lattice and we are fully committed to offering an eco-system of best-in-class solutions as demonstrated by our small cells partnership with Azcom Technology.”
Combined with soft IP for connectivity, control path and data path functions optimized for low complexity HetNet applications, the LatticeECP3, MachXO2™ and MachXO3™ FPGA families, Lattice power management devices and Azcom reference platform give developers everything they need for affordable innovation of HetNet systems.
Specific elements of the HetNet Solutions Portfolio include:
• Low density LatticeECP3 FPGAs: With up to 16 3.2 Gbps serdes channels, LatticeECP3 FPGAs offer the perfect low cost connectivity solution for implementing interface protocols such as CPRI, JESD204B, SRIO, PCI Express, Ethernet and others.
• Ultra low density MachXO2 and new MachXO3 families: With ultra-low power, small footprint packages, built-in security features and high I/O-to-logic ratio, MachXO2 and MachXO3 FPGAs offer the perfect instant-on solution for quickly implementing system control and glue logic functions including timing offload, I/O expansion and bridging.
• Platform Manager™ and Power Manager II families: Programmable, high precision and integrated power management solutions for board level functions including power supply sequencing, monitoring, voltage measurement and power-ride-through control for brown out protection, a key requirement for small cells.
• Azcom ngSCBP baseband board: 3GPP (3rd Generation Partnership Project) Release 9 compliant dual mode LTE/HSPA+ small cell baseband platform, with on board LatticeECP3-70 FPGA implementing CPRI interface management, GPS interface control, glue logic etc.
• Azcom ngSCBP- RF board: Simultaneous support for LTE and HSPA+ from 700MHz to 2.6GHz, up to 4x4 MIMO and 27dBm output power, with on board LatticeECP3-150 FPGA implementing digital front end (DFE) functions such as CPRI, multicarrier DUC/DDC, CFR, NCO and JESD207.
