Delivering Precision Performance

Modern microprocessors, FPGAs and other complex ICs require accurate power supply voltages, often more accurate, in fact, than the tolerances provided by commodity low-dropout regulators (LDOs) and DC-to-DC power supplies. More precise power supplies are available, but at a premium price. The cost effective alternative is to use a separate power supply management IC to adjust the precision of one or more supplies at the same time. Providing a control signal to dynamically and continuously adjust a power supply's output voltage is referred to as closed-loop trimming. Once the power supply is adjustable, other benefits can be realized. For example, a circuit board can also be tested for reliable operation over a range of voltage supply values. This is referred to as supply voltage margining. The adjustable voltage supply values can be used to simulate the expected precision of the power supply voltage, drift that can occur due to component aging, ambient temperature changes or fluctuations in supply load current. Voltage margining A voltage margining test ensures that the board is functional across the operating range of its onboard and input supplies. Circuit boards are also subject to other margining tests, such as temperature, timing and noise. For example, if the allowed tolerance of a supply input is ±10%, the voltage margining test ensures that the board is functional when the input supply is at its margin-high (nominal voltage +10%) value and when its supply is at margin-low (nominal voltage -10%) value. If the board has a number of board-mounted supplies, then the margining test should also include the variation of individual board-mounted supplies. Margining tests typically are conducted during board debug. In some cases, Quality and Reliability departments will require margining before they will approve manufactured boards. Voltage margining implementation Figure 1 shows a DC-DC converter with a resistor connected to its internal Trim/Feedback Node. The value of this resistor typically determines the nominal output voltage value of the DC-DC converter and is specified in the power supply's datasheet. DC-DC converters usually require standard resistor values to set their output voltage to a standard value - e.g. 3.3V, 2.5V, 1.5V. To change the output voltage by +/-5% of their nominal operating voltage, designers use either a potentiometer for each of the DC-DC converters or a series parallel combination of standard resistor values. One has to manually implement the resistor change to all the boards that will be subject to testing in an environmental chamber. Due to delays and added cost, margin testing usually is not performed in a production environment. If it could be automated, however, it would become a powerful tool in verifying the reliable operation of a circuit board. Applications that require power supply trimming Trimming is required for circuit boards using ICs that require low supply voltages (1.2V or lower) with high current ratings (5A or more). For example, a 1.2V DC-DC converter should guarantee a maximum of +/-5% (+/-60mV) variation under all of the following conditions:

• No-load to full-load average current variation
• Output voltage ripple
• Dynamic power demands by the IC during different average current levels
• Component tolerances during manufacturing

In general, to meet the voltage device spec under all of the above conditions safely, the DC-DC converter requires an initial operating voltage accuracy of 2% or better. These high-accuracy, low-voltage supplies are usually more expensive and require high precision resistors to set the voltage. Alternatively, the accuracy of a conventional lower cost DC-DC converter can be improved by using an external trimming mechanism. The next section describes trimming using a Lattice Semiconductor power management IC. Similar products are also available from Maxim, TI and Analog Devices. The Lattice Semiconductor products will be used here to explain the basic principles of trimming and margining.

Trimming and margining: Principle of operation Figure 2 shows a Lattice Power Manager II device implementing trimming and margining functions for an analog DC-DC converter. On the top portion of Figure 2 is a DC-DC converter supplying power to its load. The output voltage is determined by the components used in its feedback circuitry. The Power Manager II device on the right measures the DC-DC output voltage using the on-chip ADC though differential sense inputs (Vmon+ and Vmon-). The Power Manager II can increase or decrease the output voltage of the DC-DC converter by increasing or decreasing its trim voltage with its on-chip DAC, thus changing the current applied to the DC-DC converter's feedback node. A set-point register in the Power Manager II control circuitry holds the required voltage value at the load. Once every 580us the Power Manager II device measures the voltage at the load using its on-chip ADC. The digital output of the ADC is compared against the set-point register contents. If the load voltage is higher, the DAC contents are decremented, which in turn reduces the voltage applied to the feedback node of the DC-DC converter. If the load voltage is lower, the DAC contents are incremented, applying higher voltage to the node. This is called the closed loop trim mechanism. It is possible to break the closed loop trim and load the DAC register directly through the I2C bus to the Power Manager II device. This method is used to implement margining. An external microprocessor directly loads a pre-selected DAC value into the Power Manager II, which will result in changing the output voltage by, for example, +/-5%. The microprocessor can also measure the output voltage of the DC-DC converter using the Power Manager II's ADC, and tweak the output voltage up and down as needed to implement closed loop margining. In a circuit board, there typically are multiple types of supplies providing different supply voltages. These individual supplies require different current levels to be injected into their feedback nodes. This in turn requires a unique resistor network for each type of DC-DC converter to be connected between the Power Manager II and the DC-DC converter feedback node.

Closed loop trim and closed loop margining using a microcontroller Figure 3 shows the configuration used for closed loop trimming with a microcontroller. Here the microcontroller measures the DC-DC converter output voltage periodically, using the on-chip ADC through the I2C bus. The microcontroller then algorithmically calculates the new DAC value depending on the DCDC converter voltage and loads the new DAC code through the I2C interface. The microcontroller-based margining is implemented entirely through the I2C bus and uses profile 0 in the Power Manager II. To implement closed loop margining, the microcontroller loads the starting DAC code into the DAC register via I2C and waits for the ADC voltage to stabilize. Depending on the stabilized voltage value, the microcontroller increments or decrements the DAC code. This method enables setting and controlling the margined voltage accurately. Designing trimming and margining networks using PAC-Designer software Determining the required resistor topology involves finding a solution for a number of nodal equations and an understanding of the error amplifier architecture of the DC-DC converter. In addition, the design can be iterated until the solution yields standard resistor values. The Lattice PAC-Designer software automates the process of determining the resistor topology while using standard resistors in the resistor network. More details on interfacing Power Manager devices to various types of power supplies and how PAC-Designer design software simplifies that task are available online at www.latticesemi.com. An excellent reference showing more detail can be found in Lattice application note AN6074, Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters. Summary The use of widely available power management control ICs, such as those available from Lattice Semiconductor (Power Manager II and Platform Manager product families) enable the use of commodity priced DC-DC and LDO power supplies to deliver precision voltage performance. In addition, testing techniques such as power supply margining are made available via I2C control once the supplies are in a control environment. Devices from multiple vendors are available ranging from simple 1 to six supplies. Lattice provides two families of power and board management devices with up to eight trim power supply trim outputs. Also integrated in the same Lattice devices are other power and board management functions, such as supply sequencing and monitoring, supervisory functions, reset generation, hot swap and more. www.latticesemi.com