90-W plug-n-play Power over Ethernet over 100-m CAT-5e cable

Powered-device detection Before a PSE can apply power to the line, it must check for an IEEE-mandated signature resistance with a power-limited probing source. To be considered a valid signature, the PD must look like 25 k? ±5% in parallel with a capacitance of 120 nF or less. The PSE, in turn, must accept a somewhat wider range of 19 k? to 26.5 k? to account for parasitic series and parallel resistances in the system (figure 2). The PSE must reject anything below 15 k? or above 33 k?, or anything with >10 μF across its terminals. The PD signature impedance is allowed to have a voltage offset of up to 1.9 V—typically caused by up to two diodes in series—and a current offset of up to 10 μA—typically caused by leakage in the PD. These terms complicate the PSE resistance measurement, since a single V-I point measurement will not account for these errors. As a result, the PSE is required to take at least two different V-I points, separated by at least 1 V at the PD. It then must calculate the difference between the two points to find the true resistive slope, subtracting out voltage and current offsets. Because CAT-5 cable typically runs in ceilings, walls, and other spaces where AC wiring is also present, 50 or 60 Hz noise can be significant. Linear Technology PSE controllers handle this by using a proprietary dual-mode, four-point detection method, which ensures immunity from false positive or negative PD detection. Powered-device classification Once the PSE has successfully detected a PD, it performs the power-classification step. The PSE must keep track of how many PDs are connected and what their power-classification levels are, and stop accepting PDs when its power budget is exhausted. The PSE checks a PD's classification signature by forcing between 14.5 and 20 V across the PD and measuring the current that the PD draws. The PSE uses the measured current to classify the PD. LTPoE++ uses a three-event classification scheme to provide mutual identification handshaking between the PSE and PD while maintaining backward compatibility with the IEEE 802.3at standard. The LTPoE++ PSE determines if a PD is a Type 1 (PoE), Type 2 (PoE+), or LTPoE++ device by the PD response to the three-event classification scheme. The LTPoE++ PSE also uses the three-event classification scheme result to update the I_CUT and I_LIM thresholds. On the other end, the LTPoE++ PD uses the number of classification events it receives to determine whether it is receiving power from a Type 1, Type 2, or LTPoE++ PSE. If the LTPoE++ PSE measures the PD's first classification event current as a Class 0, 1, 2, or 3 device, the LTPoE++ PSE will proceed to power on the port as a Type 1 device. Otherwise, if the PSE detects a Class 4 PD during the first classification event, the LTPoE++ PSE will continue with a second classification event, as defined in the PoE+ specification. This informs the PD that it is receiving power from either a Type 2 or LTPoE++ PSE. The absence of the second classification event indicates the PD is receiving power from a Type 1 PSE that is limited to Type 1 power levels. The Type 2 PD physical layer classification is defined by IEEE as two consecutive Class 4 results. The LTPoE++ PD must also display two consecutive Class 4 results in the first and second classification events. The LTPoE++ PSE will move onto the third classification event after valid Class 4 measurements in the first and second classification events. The third classification event must result in a classification other than Class 4 to recognize the PD as LTPoE++ capable. An LTPoE++ PSE will consider a PD that maintains Class 4 during the third classification event as a Type 2 PD. The IEEE 802.3at standard requires compliant Type 2 PDs to repeat Class 4 responses for all class events.

The third classification event informs the LTPoE++ PD that it is receiving power from an LTPoE++ PSE. Table 1 shows the class-event permutations for the various PD power levels. The LTPoE++ PD presents a Class-0 through -3 classification current during the third classification event. The four different classes indicate to the LTPoE++ PSE the maximum power the LTPoE++ PD is requesting at its input. The four LTPoE++ power levels of 38.7, 52.7, 70, and 90 W at the LTPoE++ PD input correspond to the four classes, Class 0, Class 1, Class 2, and Class 3. DC disconnect Just as a PSE must only send power to valid PD, a PSE also must not leave power on after the powered device has been unplugged because a powered cable could subsequently connect to a device that doesn't expect power. LTPoE++ uses the DC disconnect method to determine the absence of a PD based on the amount of DC current flowing from the PSE to the PD. When the current stays below a threshold I_MIN—between 5 and 10 mA—for a given time t_DIS—300 to 400ms—the PSE assumes that the PD is absent and turns off the power. Putting it all together Once a PSE has successfully detected and classified a PD, it then makes the decision whether to supply power to it. If the PSE's available power is adequate to power the PD, the PSE powers on the PD and begins monitoring the port for the DC disconnect condition. The PSE now has the whole picture: The detection sequence tells it that there is a real PD attached to the port. The classification routine tells it how much power that PD will draw so it can allocate its power supply resources accordingly. Finally, the DC disconnect method tells it that the PD is still present and operating normally. The PD, in turn, has a straightforward way to communicate to the PSE what it is, how much power it wants, and whether or not it wants that power to keep flowing. All of this occurs without affecting the data stream in any way. One important distinction with LTPoE++ is that it does not require the use of the LLDP (link-layer discovery protocol) that the IEEE mandated in its PoE+ specification for software-level power negotiation. LLDP requires extensions to standard Ethernet stacks and can represent a significant software development effort. LTPoE++ PSEs and PDs autonomously negotiate power level requirements and capabilities at the hardware level while remaining fully compatible with LLDP-based implementations. This gives LTPoE++ system designers the choice to implement or not implement LLDP. Proprietary end-to-end systems may choose to forgo LLDP support. This creates time-to-market advantages while further reducing BOM costs, board size, and complexity.

LTPoE++ plug-n-play support Linear Technology offers single, quad, octal, and 12-port LTPoE++ PSE controllers with low power dissipation, robust ESD and cable-discharge protection, low component count, and cost-effective designs. When paired with the LT4275 PD controller (figure 3), a complete plug-n-play LTPoE++ system, with no LLDP required, can deliver up to 90 W while remaining fully compatible with PoE+ and PoE standards. The entire implementation uses external low-RDS(ON) MOSFETs to drastically reduce overall PD heat dissipation and maximize power efficiency, which is important at all power levels. High absolute maximum ratings on all analog pins and cost-effective cable-discharge protection ensure the devices are safe from the most common Ethernet line surges. Linear Technology